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MAX3882 - 2.488Gbps/2.67Gbps 1:4 Demultiplexer

General Description

The MAX3882 is a deserializer combined with clock and data recovery and limiting amplifier ideal for converting 2.488Gbps/2.67Gbps serial data to 4-bit-wide, 622Mbps/667Mbps parallel data for SDH/SONET applications.

Key Features

  • o No Reference Clock Required for Data Acquisition o Input Data Rates: 2.488Gbps or 2.67Gbps o Fully Integrated Clock and Data Recovery with Limiting Amplifier and 1:4 Demultiplexer o Parallel Output Rate: 622Mbps/667Mbps o Differential Input Range: 10mVP-P to 1.6VP-P without Threshold Adjust o Differential Input Range: 50mVP-P to 600mVP-P with Threshold Adjust o 0.65UI High-Frequency Jitter Tolerance o Loss-of-Lock (LOL) Indicator o Wide Input Threshold Adjust Range: ±170mV o Maintain Valid Clo.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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19-2718; Rev 0; 1/03 www.DataSheet4U.com 2.488Gbps/2.67Gbps 1:4 Demultiplexer with Clock and Data Recovery and Limiting Amplifier General Description The MAX3882 is a deserializer combined with clock and data recovery and limiting amplifier ideal for converting 2.488Gbps/2.67Gbps serial data to 4-bit-wide, 622Mbps/667Mbps parallel data for SDH/SONET applications. The device accepts serial NRZ input data as low as 10mVP-P of 2.488Gbps/2.67Gbps and generates four parallel LVDS data outputs at 622Mbps/667Mbps. Included is an additional high-speed serial data input for system loopback diagnostic testing. For data acquisition, the MAX3882 does not require an external reference clock.