SY100ELT982 Datasheet | Micrel Semiconductor

Micrel, Inc. NOT REMENDED FOR NEW DESIGNS PECL-TO-CML TRANSLATOR WITH OUTPUT ENABLE Features s Up to 1.25Gbps operation s 25m A peak drive current s Adjustable output current s Separate output enable s Differential inputs for data s 75KΩ input pull-down resistor s Single power supply s Available in a tiny 10-pin MSOP DESCRIPTION The SY100ELT982 is a high speed PECL-to-CML translator. The output current is DC current controlled by IRSET, current through the resistor RSET. The output OUT is LOW when output enable is HIGH. The device incorporates plementary open collector outputs with a capability of driving peak current of 25m A. The SY100ELT982 utilizes the high performance bipolar ASSET™ technology. APPLICATIONS s Telemunications s CML output oscillator s Ga AS interface BLOCK DIAGRAM RTERM DIN Internal Logic DIN EN BIAS Control IOUT 40X VREF Output Current Control VEE RSET RSET ASSET technology is a trademark of Micrel, Inc. M9999-031506 hbwhelp@micrel. or (408) 955-1690 VCC GND Rev.: D Amendment: /0 Issue Date: March 2006 Micrel, Inc. PACKAGE/ORDERING INFORMATION Ordering Information(1) /EN DIN /DIN VREF RSET 1 10 VCC 2 9 /OUT MSOP K10-1 8...