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Micrel, Inc.
DUAL TTL-to-DIFFERENTIAL PECL TRANSLATOR
SY10ELT22 SY100ELT22 SY10ELT22
SY100ELT22
FEATURES
■ ■ ■ ■ ■ ■ 300ps typical propagation delay <100ps output-to-output skew Differential PECL outputs PNP TTL inputs for minimal loading Flow-through pinouts Available in 8-pin SOIC package
DESCRIPTION
The SY10/100ELT22 are dual TTL-to-differential PECL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the ELT22 makes it ideal for applications which require the tranlation of a clock and a data signal.