SY100ELT25 Datasheet | Micrel Semiconductor

Micrel, Inc. Features s 2.6ns typical propagation delay s Differential ECL inputs s 24m A TTL outputs s Flow-through pinouts s Available in 8-pin SOIC package DIFFERENTIAL ECL-to-TTL TRANSLATOR DESCRIPTION The SY100ELT25 is a differential ECL-to-TTL translator. Because ECL levels are used, a +5V, - 5.2V (or - 4.5V) and ground are required. The small outline 8lead SOIC package and the single gate of the ELT25 makes it ideal for those applications where performance, space and low power are at a premium. The VBB output allows the ELT25 to also be used in a single-ended input mode. In this mode the VBB output is tied to the D input for a non-inverting buffer or the D input for an inverting buffer. If used the VBB pin should be bypassed to ground via a 0.01µF capacitor. PIN NAMES Pin Q D VCC VEE VBB GND Function TTL Output Differential ECL Inputs Positive Supply Negative Supply Reference Output Ground M9999-031506 hbwhelp@micrel. or (408) 955-1690 Rev.: C Amendment: /0 Issue Date: March 2006 Micrel, Inc. PACKAGE/ORDERING INFORMATION Ordering Information(1) VEE 1 8 VCC Part Number Package Operating Type Range Package Marking Lead Finish D2 7Q SY100ELT25ZC SY100ELT25ZCTR(2) Z8-1 Z8-1 mercial mercial XEL25 XEL25 Sn-Pb...