The SY100ELT24 is a TTL-to-differential ECL translator.
5.2V (or
4.5V) and ground are required.
Key Features
s 500ps typical propagation delay s Differential ECL output s PNP TTL input for minimal loading s Flow-through pinouts s Available in 8-pin SOIC package.
Full PDF Text Transcription for SY100ELT24 (Reference)
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SY100ELT24. For precise diagrams, and layout, please refer to the original PDF.
Micrel, Inc. NOT RECOMMENDED FOR NEW DESIGNS TTL-to-DIFFERENTIAL ECL TRANSLATOR SY100ELT24 SY100ELT24 FEATURES s 500ps typical propagation delay s Differential ECL output...
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4 FEATURES s 500ps typical propagation delay s Differential ECL output s PNP TTL input for minimal loading s Flow-through pinouts s Available in 8-pin SOIC package DESCRIPTION The SY100ELT24 is a TTL-to-differential ECL translator. Because ECL levels are used, a +5V, –5.2V (or –4.5V) and ground are required. The small outline 8lead SOIC package and the single gate of the ELT24 makes it ideal for those applications where performance, space and low power are at a premium. PIN NAMES Pin Q, Q D VCC VEE GND Function Differential ECL Output TTL Input Positive Supply Negative Supply Ground M9999-031506 hbwhelp@micrel.com or (408)
SY100ELT24 Datasheet
