SY100ELT22 Description
The SY100ELT22 is a dual TTL-to-differential PECL translator. Because positive ECL (PECL) levels are used, only +5V and ground is required. The small outline 8-lead SOIC package and the low-skew, dual-gate design of the SY100ELT22 makes it ideal for applications that require the translation of a clock and a data signal.
SY100ELT22 Key Features
- 300 ps Typical Propagation Delay
- <100 ps Output-to-Output Skew
- Differential PECL Outputs
- PNP TTL Inputs for Minimal Loading
- Flow-Through Pinouts
- Available in 8-Lead SOIC Package