SY100S318 Datasheet | Micrel Semiconductor

Micrel, Inc. 5-WIDE 5, 4, 4, 4, 2 OA/OAI GATE Features DESCRIPTION s Max. propagation delay of 800ps s IEE min. of - 55m A s Extended supply voltage option: VEE = - 4.2V to - 5.5V s Voltage and temperature pensation for improved noise immunity s Internal 75kΩ input pull-down resistors s 70% faster than Fairchild s 40% lower power than Fairchild s Function and pinout patible with Fairchild F100K s Available in 28-pin PLCC package The SY100S318 is an ultra-fast 5-wide 5, 4, 4, 4, 2 OR/ AND gate with both true and plementary outputs, designed for use in high-performance ECL systems. The inputs on this device have 75kΩ pull-down resistors. BLOCK DIAGRAM D1a D2a D3a D4a D5a D1b D2b D3b D4b D1c D2c D3c D4c D1d D2d D3d D4d D1e D2e PIN NAMES Pin Dna - Dne O- O VEES VCCA Function Data Inputs (n = 1...5) Data Outputs VEE Substrate VCCO for ECL Outputs M9999-042307 hbwhelp@micrel. or (408) 955-1690 Rev.: I Amendment: /0 Issue Date: April 2007 Micrel, Inc. PACKAGE/ORDERING INFORMATION D1b D5a D4a VEES D3a D2a D1a Ordering Information 11 10 9 8 7 6 5 Part Number Package...