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SY10E154 - 5-BIT 2:1 MUX-LATCH

Download the SY10E154 datasheet PDF. This datasheet also covers the SY100E154 variant, as both devices belong to the same 5-bit 2:1 mux-latch family and are provided as variant models within a single manufacturer datasheet.

Description

The SY10/100E154 offer five 2:1 multiplexers followed by latches with differential outputs, designed for use in new, high-performance ECL systems.

The two external Latch-Enable signals (LEN1, LEN2) are gated through a logical OR operation before use as control for the five latches.

Features

  • s 750ps max. LEN to output s Extended 100E VEE range of.
  • 4.2V to.
  • 5.5V s 700ps max. D to output s Differential outputs s Asynchronous Master Reset s Dual latch-enables s Fully compatible with industry standard 10KH, 100K ECL levels s Internal 75KΩ input pulldown resistors s Fully compatible with Motorola MC10E/100E154 s Available in 28-pin PLCC package BLOCK.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SY100E154_MicrelSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number SY10E154
Manufacturer Micrel Semiconductor
File Size 58.67 KB
Description 5-BIT 2:1 MUX-LATCH
Datasheet download datasheet SY10E154 Datasheet

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Other Datasheets by Micrel Semiconductor

Part Number Description
SY10E150 6-BIT D LATCH
SY10E151 6-BIT D REGISTER
SY10E155 6-BIT 2:1 MUX-LATCH
SY10E156 3-BIT 4:1 MUX-LATCH
SY10E157 QUAD 2:1 MULTIPLEXER

Full PDF Text Transcription

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Micrel, Inc. 5-BIT 2:1 MUX-LATCH SY10E154 SY1S0YE10105E4154 SY100E154 FEATURES s 750ps max. LEN to output s Extended 100E VEE range of –4.2V to –5.5V s 700ps max. D to output s Differential outputs s Asynchronous Master Reset s Dual latch-enables s Fully compatible with industry standard 10KH, 100K ECL levels s Internal 75KΩ input pulldown resistors s Fully compatible with Motorola MC10E/100E154 s Available in 28-pin PLCC package BLOCK DIAGRAM D0a D0b D1a D1b D2a D2b D3a D3b D4a D4b SEL LEN1 LEN2 MR MUX SEL MUX SEL MUX SEL MUX SEL MUX SEL DQ EQ NR DQ EQ NR DQ EQ NR DQ EQ NR DQ EQ NR Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4 DESCRIPTION The SY10/100E154 offer five 2:1 multiplexers followed by latches with differential outputs, designed for use in new, high-performance ECL systems.
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