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SY10H607 - REGISTERED HEX PECL-TO-TTL

Description

The SY10/100H607 are 6-bit, registered, dual supply PECL-to-TTL translators.

The devices feature differential PECL inputs for both data and clock.

The TTL outputs feature 48mA sink, 15mA source drive capability for driving high fanout loads.

Features

  • s Differential PECL data and clock inputs s 48mA sink, 15mA source TTL outputs s Single +5V power supply s Multiple power and ground pins to minimize noise s Specified within-device skew s VBB output for single-ended use s Fully compatible with MC10H/100H607 s Available in 28-pin PLCC package.

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Datasheet preview – SY10H607

Datasheet Details

Part number SY10H607
Manufacturer Micrel Semiconductor
File Size 88.84 KB
Description REGISTERED HEX PECL-TO-TTL
Datasheet download datasheet SY10H607 Datasheet
Additional preview pages of the SY10H607 datasheet.

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Full PDF Text Transcription

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Micrel, Inc. NOT RECOMMENDED FOR NEW DESIGNS REGISTERED HEX PECL-TO-TTL SY10H607 SY1S0YH10600H7607 SY100H607 FEATURES s Differential PECL data and clock inputs s 48mA sink, 15mA source TTL outputs s Single +5V power supply s Multiple power and ground pins to minimize noise s Specified within-device skew s VBB output for single-ended use s Fully compatible with MC10H/100H607 s Available in 28-pin PLCC package DESCRIPTION The SY10/100H607 are 6-bit, registered, dual supply PECL-to-TTL translators. The devices feature differential PECL inputs for both data and clock. The TTL outputs feature 48mA sink, 15mA source drive capability for driving high fanout loads. The asynchronous master reset control is a PECL level input.
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