SY89828L Datasheet | Micrel Semiconductor

FEATURES - High-performance dual 1:10, 1GHz LVDS fanout buffer/translator - Two banks of 10 differential LVDS outputs - Guaranteed AC parameters over temperature and voltage: - > 1GHz f MAX - < 50ps within device skew - < 400ps tr, tf time - Each bank includes a 2:1 input mux - 2:1 mux input accepts LVDS and LVPECL - Low jitter performance - < 1ps RMS cycle-to-cycle jitter - < 1ps PP total jitter - 3.3V supply voltage - Output enable function - LVDS input includes internal 100Ω termination - Available in a 64-Pin EPAD-TQFP APPLICATIONS - Enterprise networking - High-end servers - munications TYPICAL APPLICATION CIRCUIT Precision Edge® DESCRIPTION The SY89828L is a precision fanout buffer with 20 differential LVDS (Low Voltage Differential Swing) output pairs. The part is designed for use in low voltage 3.3V applications that require a large number of outputs to drive precisely aligned, ultra low-skew signals to their destination. The input is multiplexed from either LVDS or LVPECL (Low Voltage Positive Emitter Coupled Logic) by the CLK_SEL1 and CLK_SEL2 pins. The Output Enables (OE1 and OE2) are synchronous so that the outputs will only be enabled/ disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. The SY89828L features a low pin-to-pin skew of less than 50ps- performance previously unachievable in a standard product having such a high number of outputs. The SY89828L is available in a single space saving package, enabling a lower overall cost solution. Primary Clock Source LVDS_CLKA /LVDS_CLKA 5 100Ω 5 Primary Card Backup Clock Source LVDS_CLKB /LVDS_CLKB 5 100Ω Redundant 5 Card SEL1 Primary/Backup Clock Select (Switchover with 2.0ns) System using SY89828L as a switchover circuit from a Primary Clock to a Redundant backup Clock in a fail-safe application. LVPECL inputs not shown in this application. Precision Edge is a...