Description
The ML6510 (Super PACMan™) is a Programmable Adaptive Clock Manager which offers an ideal solution for managing high speed synchronous clock distribution in next generation, high speed personal computer and workstation system designs.
Features
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Input clocks can be either TTL or PECL with low input to output clock phase error 8 independent, automatically deskewed clock outputs with up to 5ns of on-board deskew range (10ns round trip) Controlled edge rate TTL-compatible CMOS clock outputs capable of driving 40Ω PCB traces 10 to 80MHz (6510-80) or 10 to 130MHz (6510-130) input and output clock frequency range Less than 500ps skew between inputs at the device loads Small-swing reference clock outputs for minimizing part-to-part skew F.