Datasheet4U Logo Datasheet4U.com

ML6516244 - 16-Bit Buffer/Line Driver with 3-State Outputs

General Description

The ML6516244 is a BiCMOS, 16-bit buffer/line driver with 3-state outputs.

This device was specifically designed for high speed bus applications.

Its 16 channels support propagation delay of 2.5ns maximum, and fast output enable and disable times of 7.0ns or less to minimize datapath delay.

Key Features

  • s Low propagation delays.
  • 2.5ns maximum for 3.3V 2.25ns maximum for 5.0V Fast output enable/disable times of 5.0ns maximum FastBus Charge current to minimize the bus settling time during active capacitive loading 3.0 to 3.6V and 4.5 to 5.5V VCC supply operation; LV-TTL compatible input and output levels with 3-state capability Industry standard pinout compatible to FCT, ALV, LCX, LVT, and other low voltage logic families ESD protection exceeds 2000V Full output swing for increased nois.

📥 Download Datasheet

Datasheet Details

Part number ML6516244
Manufacturer Micro Linear
File Size 253.68 KB
Description 16-Bit Buffer/Line Driver with 3-State Outputs
Datasheet download datasheet ML6516244 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
August 2000 PRELIMINARY ML6516244* 16-Bit Buffer/Line Driver with 3-State Outputs GENERAL DESCRIPTION The ML6516244 is a BiCMOS, 16-bit buffer/line driver with 3-state outputs. This device was specifically designed for high speed bus applications. Its 16 channels support propagation delay of 2.5ns maximum, and fast output enable and disable times of 7.0ns or less to minimize datapath delay. This device is designed to minimize undershoot, overshoot, and ground bounce to decrease noise delays. These transceivers implement a unique digital and analog implementation to eliminate the delays and noise inherent in traditional digital designs. The device offers a new method for quickly charging up a bus load capacitor to minimize bus settling times, or FastBus™ Charge.