MT48LC16M16A2 Datasheet | Micron Technology

Features Automotive SDR SDRAM MT48LC64M4A2 - 16 Meg x 4 x 4 banks MT48LC32M8A2 - 8 Meg x 8 x 4 banks MT48LC16M16A2 - 4 Meg x 16 x 4 banks Features - PC100- and PC133-pliant - Fully synchronous; all signals registered on positive edge of system clock - Internal, pipelined operation; column address can be changed every clock cycle - Internal banks for hiding row access/precharge - Programmable burst lengths: 1, 2, 4, 8, or full page - Auto precharge, includes concurrent auto precharge and auto refresh modes - Self refresh mode (not available on AAT devices) - Auto refresh - 64ms, 8192-cycle (mercial and industrial) - 16ms, 8192-cycle (automotive) - LVTTL-patible inputs and outputs - Single 3.3V ±0.3V power supply - AEC-Q100 - PPAP submission - 8D response time Options - Configurations - 64 Meg x 4 (16 Meg x 4 x 4 banks) - 32 Meg x 8 (8 Meg x 8 x 4 banks) - 16 Meg x 16 (4 Meg x 16 x 4 banks) -...