MT48LC16M16LFFG Datasheet | Micron Technology

FEATURES - Temperature pensated Self Refresh (TCSR) - Fully synchronous; all signals registered on positive edge of system clock - Internal pipelined operation; column address can be changed every clock cycle - Internal banks for hiding row access/precharge - Programmable burst lengths: 1, 2, 4, 8, or full page - Auto Precharge, includes CONCURRENT AUTO PRECHARGE and Auto Refresh Modes - Self Refresh Mode - 64ms, 8,192-cycle refresh - LVTTL-patible inputs and outputs - Low voltage power supply - Deep Power Down - Partial Array Self Refresh power-saving mode MT48LC16LFFG, MT48LC16M16LFBG, MT48V16MLFFG, MT48V16M16LFBG, MT48H16M16LFFG, MT48H16M16LFBG 4 Meg x 16 x 4 banks For the latest data sheet revisions, please refer to the Micron Web site: .micron./dramds BALL ASSIGNMENT (Top View) 54-Ball VFBGA 1 A B C D E F VSS DQ14 DQ12 DQ10 DQ8 UDQM A12 A8 VSS 2 DQ15 DQ13 DQ11 DQ9 NC CK A11 A7 A5 3 VSSQ VDDQ VSSQ VDDQ VSS CKE A9 A6 A4 4 5 6 7 VDDQ VSSQ VDDQ VSSQ VDD CAS BA0 A0 A3 8 DQ0 DQ2 DQ4 DQ6 LDQM RAS BA1 A1 A2 9 VDD DQ1 DQ3 DQ5 DQ7 WE CS A10 VDD OPTIONS MARKING - V DD /V DD Q 3.3V/3.3V LC 2.5V/2.5V- 1.8V V 1.8V/1.8V H - Configurations 16 Meg x 16 (4 Meg x 16 x 4 banks) 16M16 - Plastic Packages - OCPL 54-pin TSOP (400 mil)1 TG 54-pin TSOP (400 mil) Lead-Free1 P 54-ball VFBGA (8mm x 14mm)2 FG 54-ball VFBGA (8mm x 14mm) Lead-Free2 BG - Timing (Cycle Time) 8.0ns @ CL = 3 (125 MHz) -8 10ns @ CL = 3 (100 MHz) -10 - Operating Temperature mercial (0o C to + 70o C) None IT Industrial (-40o C to + 85o C) NOTE: 1. Contact Factory for availability. 2. Due to space limitations, FBGA-packaged ponents have an abbreviated part mark that is different from the part number. See our Web site for more information on abbreviated ponent marks. Configuration Refresh Count Row Addressing Bank Addressing Column Addressing 16 Meg x 16 4 Meg x 16 x 4 banks 8K 8K (A0- A12) 4 (BA0, BA1) 512 (A0- A8) KEY TIMING PARAMETERS SPEED GRADE -8 -10 -8 -10 -8 -10 CLOCK FREQUENCY 125 MHz 100 MHz 100 MHz...