MT4LC16M4G3 Datasheet | Micron Technology

16 MEG x 4 EDO DRAM DRAM Features - Single +3.3V ±0.3V power supply - Industry-standard x4 pinout, timing, functions, and packages - 12 row, 12 column addresses (H9) or 13 row, 11 column addresses (G3) - High-performance CMOS silicon-gate process - All inputs, outputs and clocks are LVTTL-patible - Extended Data-Out (EDO) PAGE MODE access - Optional self refresh (S) for low-power data retention - 4,096-cycle CAS#-BEFORE-RAS# (CBR) REFRESH distributed across 64ms MT4LC16M4G3, MT4LC16M4H9 For the latest data sheet, please refer to the Micron Web site: .micronsemi./mti/msp/html/datasheet.html PIN ASSIGNMENT (Top View) 32-Pin SOJ VCC DQ0 DQ1 NC NC NC NC WE# RAS# A0 A1 A2 A3 A4 A5...