| Part number | M5M4V16169DTP-10 |
|---|---|
| Download | M5M4V16169DTP-10 Datasheet (PDF) |
| File Size | 737.49 KB |
| Manufacturer | Mitsubishi Electric |
| Description | 16M (1M-WORD BY 16-BIT) CACHED DRAM |
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| Part Number | Description |
|---|---|
| M5M4V16169DTP-15 | 16M (1M-WORD BY 16-BIT) CACHED DRAM |
| M5M4V16169DTP-7 | 16M (1M-WORD BY 16-BIT) CACHED DRAM |
| M5M4V16169DTP-8 | 16M (1M-WORD BY 16-BIT) CACHED DRAM |
| M5M4V16169DTP | 16M (1M-WORD BY 16-BIT) CACHED DRAM |
| M5M4V16169DRT-10 | 16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM |
PINCONFIGURATION (TOP VIEW) 1. The block data transfer between the DRAM and the data transfer buffers (RB1/RB2/WB1/WB2) is performed in one instruction cycle, a fundamental advantage over a conventional DRAM/SRAM cache. The RAM is fabricated with a high performance CMOS process, and is ideal.
