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M5M54R08AJ-10 - 4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM

General Description

The M5M54R08AJ is a family of 524288-word by 8-bit static RAMs, fabricated with the high performance CMOS silicon gate process and designed for high speed application.

These devices operate on a single 3.3V supply, and are directly TTL compatible.

They include a power down feature as well.

Key Features

  • Fast access time M5M54R08AJ-10 10ns(max) M5M54R08AJ-12 12ns(max) M5M54R08AJ-15 15ns(max).
  • Single +3.3V power supply.
  • Fully static operation : No clocks, No refresh.
  • Common data I/O.
  • Easy memory expansion by S.
  • Three-state outputs : OR-tie capability.
  • OE prevents data contention in the I/O bus.
  • Directly TTL compatible : All inputs and outputs A0 A1 address A2 inputs A3 A4 chip select S input data inputs/ DQ1 outputs DQ2 (3.3V).

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MITSUBISHI LSIs 1998.11.30 Ver..B PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change M5M54R08AJ-10,-12,-15 4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM PIN CONFIGURATION (TOP VIEW) DESCRIPTION The M5M54R08AJ is a family of 524288-word by 8-bit static RAMs, fabricated with the high performance CMOS silicon gate process and designed for high speed application. These devices operate on a single 3.3V supply, and are directly TTL compatible. They include a power down feature as well. FEATURES •Fast access time M5M54R08AJ-10 ... 10ns(max) M5M54R08AJ-12 ... 12ns(max) M5M54R08AJ-15 ... 15ns(max) •Single +3.