M5M54R08J-12 Datasheet | Mitsubishi Electric

MITSUBISHI LSIs M5M54R08J-12,-15 1997.11.20 Rev.F 4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM DESCRIPTION The M5M54R08J is a family of 524288-word by 8-bit static RAMs, fabricated with the high performance CMOS silicon gate PIN CONFIGURATION (TOP VIEW) A0 A1 A2 lead package(SOJ). A3 These device operate on a single 5V supply, and are directly A4 chip select TTL patible. They include a power down feature as well. S input data inputs/ DQ1 Features outputs DQ2 - Fast access time M5M54R08J-12 - - - - 12ns(max) (5V) VCC M5M54R08J-15 - - - - 15ns(max) (0V) GND data - Low power dissipation Active - - - - - - - - - - 550m W(typ) DQ3 inputs/ Stand by - - - - - - - - - - 5m W(typ) DQ4 outputs write control W - Single +5V power supply input - Fully static operation : No clocks, No refresh A5 - mon data I/O A6 address - Easy memory expansion by S A7 inputs - Three-state outputs : OR-tie capability A8 - OE prevents data contention in the I/O bus A9 - Directly TTL patible : All inputs and outputs The M5M54R08J is offered in a 36-pin plastic small outline Jaddress inputs process and designed for high speed...