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MCM72BF32 - 256KB and 512KB BurstRAM Secondary Cache

Key Features

  • tric fields; however, it is advised that normal precautions be taken to avoid.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM72BF32/D 256KB and 512KB BurstRAM™ Secondary Cache Module for Pentium™ The MCM72BF32SG and MCM72BF64SG are designed to provide a burstable, high performance, 256K/512K L2 cache for the Pentium microprocessor. The modules are configured as 32K x 72 and 64K x 72 bits in a 160 pin card edge memory module. Each module uses four of Motorola’s MCM67B518 or MCM67B618 BiCMOS BurstRAMs. All 72 I/Os are series terminated for added noise immunity. Bursts can be initiated with either address status processor (ADSP) or address status controller (ADSC). Subsequent burst addresses are generated internal to the BurstRAM by the burst advance (ADV) input pin.