MMDF2N06VL Overview
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MMDF2N06VL/D Product Preview TMOS V™ SO-8 for Surface Mount N Channel Enhancement Mode Silicon Gate TMOS V is a new technology designed to achieve an on resistance area product about one half that of standard MOSFETs. This new technology more than doubles the present cell density of our 50 and 60 volt TMOS devices. Just as with our TMOS E FET designs, TMOS...
MMDF2N06VL Key Features
- On-resistance Area Product about One-half that of Standard MOSFETs with New Low Voltage, Low RDS(on) Technology
- Faster Switching than E-FET Predecessors
- Avalanche Energy Specified
- IDSS and VDS(on) Specified at Elevated Temperature
- Static Parameters are the Same for both TMOS V and TMOS E-FET
- Miniature SO-8 Surface Mount Package
- Saves Board Space
- Mounting Information for SO-8 Package Provided MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
- Continuous Drain Current
- Continuous @ TA = 25°C Drain Current
MMDF2N06VL Applications
- On-resistance Area Product about One-half that of Standard MOSFETs with New Low Voltage, Low RDS(on) Technology