Datasheet Details
| Part number | MPC9653 |
|---|---|
| Manufacturer | Motorola Semiconductor (now NXP Semiconductors) |
| File Size | 332.69 KB |
| Description | 3.3V 1:8 LVCMOS PLL CLOCK GENERATOR |
| Datasheet | MPC9653_Motorola.pdf |
|
|
Overview: MOTOROLA Freescale Semiconductor, Inc. SEMICONDUCTOR TECHNICAL DATA Order Number: MPC9653/D Rev 3, 02/2003 3.3V 1:8 LVCMOS PLL Clock Generator MPC9653 The MPC9653 is a 3.3V compatible, 1:8 PLL based clock generator and zero-delay buffer targeted for high performance low-skew clock distribution in mid-range to high-performance telecom, networking and computing applications. With output frequencies up to 125 MHz and output skews less than 150 ps the device meets the needs of the most demanding clock applications.
| Part number | MPC9653 |
|---|---|
| Manufacturer | Motorola Semiconductor (now NXP Semiconductors) |
| File Size | 332.69 KB |
| Description | 3.3V 1:8 LVCMOS PLL CLOCK GENERATOR |
| Datasheet | MPC9653_Motorola.pdf |
|
|
|
32 LEAD LQFP PACKAGE The MPC9653 utilizes PLL technology to frequency lock its outputs CASE 873A onto an input reference clock.
Normal operation of the MPC9653 requires the connection of the QFB output to the feedback input to close the PLL feedback path (external feedback).
With the PLL locked, the output frequency is equal to the reference frequency of the device and VCO_SEL selects the operating frequency range of 25 to 62.5 MHz or 50 to 125 MHz.
| Part Number | Description |
|---|---|
| MPC9658 | 3.3V 1:10 LVCMOS PLL Clock Generator |
| MPC9600 | LOW VOLTAGE 2.5 V AND 3.3 V CMOS PLL CLOCK DRIVER |
| MPC961C | LOW VOLTAGE ZERO DELAY |
| MPC962305 | (MPC962305 / MPC962309) Low-Cost 3.3 V Zero Delay Buffer |
| MPC962308 | 3.3 V Zero Delay Buffer |
| MPC962309 | (MPC962305 / MPC962309) Low-Cost 3.3 V Zero Delay Buffer |
| MPC9100 | DUAL PLL CLOCK GENERATOR |
| MPC9108 | MULTIPLE OUTPUT CLOCK SYNTHESIZER |
| MPC9109 | LOW VOLTAGE 1:18 CLOCK DISTRIBUTION CHIP |
| MPC911 | LOW-VOLTAGE 1:9 DIFFERENTIAL ECL/HSTL TO HSTL CLOCK DRIVER |