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MPC9658 - 3.3V 1:10 LVCMOS PLL Clock Generator

General Description

The MPC9658 utilizes PLL technology to frequency lock its outputs FA SUFFIX onto an input reference clock.

Normal operation of the MPC9658 requires 32 LEAD LQFP PACKAGE CASE 873A the connection of the QFB output to the feedback input to close the PLL feedback path (external feedback).

Key Features

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  • 1:10 PLL based low-voltage clock generator LOW.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA Freescale Semiconductor, Inc. SEMICONDUCTOR TECHNICAL DATA Order Number: MPC9658/D Rev 3, 02/2003 3.3V 1:10 LVCMOS PLL Clock Generator MPC9658 The MPC9658 is a 3.3V compatible, 1:10 PLL based clock generator and zero-delay buffer targeted for high performance low-skew clock distribution in mid-range to high-performance telecom, networking and computing applications. With output frequencies up to 250 MHz and output skews less than 120 ps the device meets the needs of the most demanding clock applications. The MPC9658 is specified for the temperature range of 0°C to +70°C. Features www.DataSheet4U.com • 1:10 PLL based low-voltage clock generator LOW VOLTAGE 3.3V LVCMOS 1:10 PLL CLOCK GENERATOR Freescale Semiconductor, Inc...