Download the P2503BDG datasheet PDF.
This datasheet also covers the P2503BDG-NIKO variant, as both devices belong to the same n-channel logic fet family and are provided as variant models within a single manufacturer datasheet.
Full PDF Text Transcription for P2503BDG (Reference)
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P2503BDG. For precise diagrams, and layout, please refer to the original PDF.
NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P2503BDG TO-252 Lead-Free PRODUCT SUMMARY V(BR)DSS RDS(ON) 30 25m ID 12A D G S ABSOLUTE MAXIMUM RA...
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ODUCT SUMMARY V(BR)DSS RDS(ON) 30 25m ID 12A D G S ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current1 Power Dissipation Junction & Storage Temperature Range TC = 25 °C TC = 70 °C TC = 25 °C TC = 70 °C VDS VGS ID IDM PD Tj, Tstg 1.GATE 2.DRAIN 3.SOURCE LIMITS 30 ±20 12 10 30 32 22 -55 to 150 UNITS V V A W °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction-to-Case RθJc Junction-to-Ambient RθJA 1Pulse width limited by maximum junction temperature.
P2503BDG Datasheet
