Download the P2504EDG datasheet PDF.
This datasheet also covers the P2504EDG-NIKO variant, as both devices belong to the same p-channel logic fet family and are provided as variant models within a single manufacturer datasheet.
Full PDF Text Transcription for P2504EDG (Reference)
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P2504EDG. For precise diagrams, and layout, please refer to the original PDF.
NIKO-SEM P-Channel Logic Level Enhancement P2504EDG Mode Field Effect Transistor TO-252 Halogen-Free & Lead- Free PRODUCT SUMMARY V(BR)DSS RDS(ON) -40V 25.8mΩ ID -18A D G...
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& Lead- Free PRODUCT SUMMARY V(BR)DSS RDS(ON) -40V 25.8mΩ ID -18A D G S ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current1 TC = 25 °C TC = 70 °C Power Dissipation TC = 25 °C TC = 70 °C Operating Junction & Storage Temperature Range VDS VGS ID IDM PD Tj, Tstg 1. GATE 2. DRAIN 3. SOURCE 100% UIS tested 100% Rg tested LIMITS -40 ±20 -18 -13.5 -40 42 27 -55 to 150 UNITS V V A W °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction-to-Case RθJc Junction-to-Ambient RθJA 1Pulse width limi
P2504EDG Datasheet
