The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3).
| Part Number | Manufacturer | Description |
|---|---|---|
| 74HCT138 | Nexperia | 3-to-8 line decoder/demultiplexer |
| 74HCT138-Q100 | Nexperia | 3-to-8 line decoder/demultiplexer |
| 74HCT138BQ | Nexperia | 3-to-8 line decoder/demultiplexer |
| 74HCT138DB | Nexperia | 3-to-8 line decoder/demultiplexer |
| 74HCT138PW | Nexperia | 3-to-8 line decoder/demultiplexer |
| 74HCT139-Q100 | Nexperia | Dual 2-to-4 line decoder/demultiplexer |
| 74HCT137 | Texas Instruments | High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer |
| 74HCT132-Q100 | Nexperia | Quad 2-input NAND Schmitt trigger |
| 74HCT132A | onsemi | Quad 2-Input NAND Gate |
| 74HCT139 | Nexperia | Dual 2-to-4 line decoder/demultiplexer |
