NXP Semiconductors 74HCT138
The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four ‘138’ ICs and one inverter.| Part No. | 74HCT138 |
|---|---|
| Datasheet | 74HCT138 Download |
| Manufacturer |  NXP Semiconductors |
| Description | 3-to-8 line decoder/demultiplexer |
| Buy | Stock & Price |
FEATURES AND BENEFITS
● Complies with JEDEC standard no. 7A● Input levels:
● For 74HC138: CMOS level
● For 74HCT138: TTL level
● Demultiplexing capability
