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GTL2006 - 13-bit GTL-/GTL/GTL+ to LVTTL translator

General Description

The GTL2006 is a 13-bit translator to interface between the 3.3 V LVTTL chip set I/O and the Xeon™ processor GTL

/GTL/GTL+ I/O.

The GTL2006 is designed for platform health management in dual processor applications.

Figure 1.

Key Features

  • Operates as a GTL.
  • /GTL/GTL+ to LVTTL sampling receiver or.
  • 3.0 V to 3.6 V operation.
  • LVTTL I/O not 5 V tolerant.
  • Series termination on the LVTTL outputs of 30 Ω.
  • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 250 V CDM per JESD22-C101 LVTTL to GTL.
  • /GTL/GTL+ driver PIN.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS GTL2006 13-bit GTL–/GTL/GTL+ to LVTTL translator Product data Supersedes data of 2003 Dec 18 2004 Jun 21 Philips Semiconductors Philips Semiconductors Product data 13-bit GTL–/GTL/GTL+ to LVTTL translator GTL2006 FEATURES • Operates as a GTL–/GTL/GTL+ to LVTTL sampling receiver or • 3.0 V to 3.