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HEF4516B Datasheet Binary Up/down Counter

Manufacturer: NXP Semiconductors

Overview: INTEGRATED CIRCUITS DATA SHEET For a plete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4516B.

General Description

The HEF4516B is an edge-triggered synchronous up/down 4-bit binary counter with a clock input (CP), an up/down count control input (UP/DN), an active LOW count enable input (CE), an asynchronous active HIGH parallel load input (PL), four parallel inputs (P0 to P3), four parallel outputs (O0 to O3), an active LOW terminal count output (TC), and an overriding asynchronous master reset input (MR).

HEF4516B MSI Information on P0 to P3 is loaded into the counter while PL is HIGH, independent of all other input conditions except MR which must be LOW.

When PL and CE are LOW, the counter changes on the LOW to HIGH transition of CP.

HEF4516B Distributor