PCK2510S Key Features
- Phase-Locked Loop Clock distribution for PC100/PC133 SDRAM
- Part: PCK2510S
- Manufacturer: NXP Semiconductors (official site)
- Size: 81.51 KB
Related NXP Semiconductors Datasheets
| Part Number | Description |
|---|---|
| PCK2510SA | 50-150 MHz 1:10 SDRAM clock driver |
| PCK2510SL | 50-150 MHz 1:10 SDRAM clock driver |
| PCK2509S | 50-150 MHz 1:9 SDRAM clock driver |
| PCK2509SA | 50-150 MHz 1:9 SDRAM clock driver |
| PCK2509SL | 50-150 MHz 1:9 SDRAM clock driver |
PCK2510S Description
The PCK2510S is a high-performance, low-skew, low-jitter, phase-locked loop (PLL) clock driver. It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal. It is specifically designed for use with synchronous DRAMs.