PHD37N06LT Datasheet | NXP Semiconductors

FEATURES - ’Trench’ technology - Very low on-state resistance - Fast switching - Stable off-state characteristics - High thermal cycling performance - Low thermal resistance PHP37N06LT, PHB37N06LT, PHD37N06LT SYMBOL d QUICK REFERENCE DATA VDSS = 55 V ID = 37 A g s RDS(ON) ≤ 35 mΩ (VGS = 5 V) RDS(ON) ≤ 32 mΩ (VGS = 10 V) GENERAL DESCRIPTION N-channel enhancement mode, logic level, field-effect power transistor in a plastic envelope using ’trench’ technology. The device has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching applications. The PHP37N06LT is supplied in the SOT78 (TO220AB) conventional leaded package. The PHB37N06LT is supplied in the SOT404 surface mounting package. The PHD37N06LT is supplied in the SOT428 surface mounting package. PINNING PIN 1 2 3 tab DESCRIPTION SOT78 (TO220AB) tab SOT404 tab SOT428 tab gate drain1 source 2 drain 1 23 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Pulsed drain current Total power dissipation Operating junction and storage temperature CONDITIONS Tj = 25 ˚C to 175˚C Tj = 25 ˚C to 175˚C; RGS = 20 kΩ Tmb = 25 ˚C Tmb = 100 ˚C Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 55 55 ± 13 37 26 148 100 175 UNIT V V V A A A W ˚C 1 It is not possible to make connection to pin 2 of the SOT428 or SOT404 packages. September 1998 1 Rev 1.400 Philips Semiconductors Product specification Trench MOS™ transistor Logic level FET THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Rth j-a Thermal resistance junction to mounting base Thermal resistance junction to ambient PHP37N06LT, PHB37N06LT, PHD37N06LT CONDITIONS TYP. - MAX. 1.5 - UNIT K/W K/W K/W SOT78 package, in free air SOT404 and SOT428 packages, pcb mounted, minimum...