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UJA1168A - Mini high-speed CAN system

Datasheet Summary

Description

The UJA1168A is a mini high-speed CAN System Basis Chip (SBC) containing an ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant HS-CAN transceiver and an integrated 5 V/100 mA supply for a microcontroller.

Features

  • 2.1 General.
  • ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant high-speed CAN transceiver.
  • Hardware and software compatible with the UJA116x product family and with improved EMC performance.
  • Loop delay symmetry timing enables reliable communication at data rates up to 5 Mbit/s in the CAN FD fast phase.
  • Autonomous bus biasing according to ISO 11898-6.
  • Fully integrated 5 V/100 mA low-drop voltage regulator for 5 V microcontroller supply (V1) NXP Semiconductors UJ.

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Datasheet Details

Part number UJA1168A
Manufacturer NXP
File Size 850.71 KB
Description Mini high-speed CAN system
Datasheet download datasheet UJA1168A Datasheet
Additional preview pages of the UJA1168A datasheet.

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Full PDF Text Transcription

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UJA1168A Mini high-speed CAN system basis chip for partial networking Rev. 1 — 23 August 2019 Product data sheet 1. General description The UJA1168A is a mini high-speed CAN System Basis Chip (SBC) containing an ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant HS-CAN transceiver and an integrated 5 V/100 mA supply for a microcontroller. It also features a watchdog and a Serial Peripheral Interface (SPI). The UJA1168A can be operated in very-low-current Standby and Sleep modes with bus and local wake-up capability and supports ISO 11898-2:2016 compliant CAN partial networking by means of a selective wake-up function. The microcontroller supply is switched off in Sleep mode.
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