Part CR16MAS5
Description Family of 16-bit CAN-enabled CompactRISC Microcontrollers
Category Microcontroller
Manufacturer National Semiconductor
Size 722.30 KB
National Semiconductor
CR16MAS5

Overview

plex Instruction Set Computer (CISC): compact code, onchip memory and I/O, and reduced cost. The CPU uses a three-stage instruction pipeline that allows execution of up to one instruction per clock cycle, or up to 25 million instructions per second (MIPS) at a clock rate of 24 MHz.