DP8480A Datasheet | National Semiconductor

Description This circuit translates ECL input levels to TTL output levels and provides a fall-through latch The TRI-STATE outputs are designed to drive standard 50 p F loads The strobe and chip select inputs operate at ECL levels Features Y Y Y Y Y 16-pin DIP TRI-STATE outputs ECL control inputs 8 ns typical propagation delay with 50 p F load Outputs are TRI-STATE during power up down for glitch free operation 10k ECL input patible Logic and Connection Diagram Dual-In-Line Package Truth Table D H L X X Q L H Q Hi-Z STR L L H X CS L L L H H e high level (most positive) L e low level (most negative) X e don’t care Order Number DP8480AJ or DP8480AN See NS Package Number J16A or N16A TL F 5861 - 1 Top View TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 5861 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications VEE Supply Voltage VCC Supply Voltage Input Voltage Output Voltage b 8V Maximum Power Dissipation at 25 C Molded Package Storage Temperature Derate molded package 11 8 m W C above 25 C 1476 m W b 65 C to a 150 C 7V GND to VEE 5 5V Remended Operating Conditions VEE Supply Voltage VCC Supply Voltage TA Ambient Temperature b 5 2V g 10% 5 0V g 10% 0 C to 75 C Electrical Characteristics (TTL Logic) Notes 2 Symbol VOL VOH IAV IOS IOZ ICC Parameter Output Low Voltage Output High Voltage Output Low Drive Current Output High Drive Current TRI- STATE Output Current Supply Current 3 and 4 Min VCC b2V 70 b 70 b 50 Conditions IOL e 12 m A IOH e b10 m A Force 2 5V Force 0V Typ Max 05 Units V V m A 150 b 150 b 350 a 50 m A m A m A Electrical Characteristics (ECL Logic) Notes 2 and 3 Symbol VIL Parameter Input Low Voltage Conditions VEE e b5 2V TA 0 C 25 C 75 C 0C 25 C 75 C Min b 1870 b 1850 b 1830 b 1145 b 1105 b...