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DS90CF386 - +3.3V LVDS Receiver

General Description

The DS90CF386 receiver converts the four LVDS data streams (Up to 2.38 Gbps throughput or 297.5 Megabytes/ sec bandwidth) back into parallel 28 bits of CMOS/TTL data (24 bits of RGB and 4 bits of Hsync, Vsync, DE and CNTL).

Key Features

  • n 20 to 85 MHz shift clock support n Rx power consumption < 142 mW (typ) @85MHz Grayscale n Rx Power-down mode < 1.44 mW (max) n ESD rating > 7 kV (HBM), > 700V (EIAJ) n Supports VGA, SVGA, XGA and Single Pixel SXGA. n PLL requires no external components n Compatible with TIA/EIA-644 LVDS standard n Low profile 56-lead or 48-lead TSSOP package Block Diagrams DS90CF386 DS90CF366 DS101085-27 DS101085-28 Order Number DS90CF386MTD See NS Package Number MTD56 Order Number DS90CF366MTD See NS Pac.

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Other Datasheets by National Semiconductor (now Texas Instruments)

Part Number Description
DS90CF383 +3.3V LVDS Transmitter
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS90CF386/DS90CF366 +3.3V LVDS Receiver 24-Bit-Color Flat Panel Display (FPD) Link — 85 MHz, +3.3V LVDS Receiver 18-Bit-Color Flat Panel Display (FPD) Link— 85 MHz November 1999 DS90CF386/DS90CF366 +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link— 85 MHz, +3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link— 85 MHz General Description The DS90CF386 receiver converts the four LVDS data streams (Up to 2.38 Gbps throughput or 297.5 Megabytes/ sec bandwidth) back into parallel 28 bits of CMOS/TTL data (24 bits of RGB and 4 bits of Hsync, Vsync, DE and CNTL). Also available is the DS90CF366 that converts the three LVDS data streams (Up to 1.