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DS90CR215 - +3.3V Rising Edge Data Strobe LVDS

Description

The DS90CR215 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams.

A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link.

Features

  • n n n n n n n n n n n n n n Single +3.3V supply Chipset (Tx + Rx) power consumption < 250 mW (typ) Power-down mode ( < 0.5 mW total) Up to 173 Megabytes/sec bandwidth Up to 1.386 Gbps data throughput Narrow bus reduces cable size 290 mV swing LVDS devices for low EMI +1V common mode range (around +1.2V) PLL requires no external components Low profile 48-lead TSSOP package Rising edge data strobe Compatible with TIA/EIA-644 LVDS standard ESD Rating > 7 kV Operating Temperature:.
  • 40˚C to +.

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Datasheet preview – DS90CR215

Datasheet Details

Part number DS90CR215
Manufacturer National Semiconductor
File Size 291.89 KB
Description +3.3V Rising Edge Data Strobe LVDS
Datasheet download datasheet DS90CR215 Datasheet
Additional preview pages of the DS90CR215 datasheet.

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Full PDF Text Transcription

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DS90CR215/DS90CR216 +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link-66 MHz March 1999 DS90CR215/DS90CR216 +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 66 MHz General Description The DS90CR215 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitted. The DS90CR216 receiver converts the LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 66 MHz, 21 bits of TTL data are transmitted at a rate of 462 Mbps per LVDS data channel. Using a 66 MHz clock, the data throughput is 1.386 Gbit/s (173 Mbytes/s).
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