SCAN18373T Datasheet | National Semiconductor

SCAN18373T Transparent Latch with TRI-STATE Outputs September 1998 SCAN18373T Transparent Latch with TRI-STATE ® Outputs General Description The SCAN18373T is a high speed, low-power transparent latch featuring separate data inputs organized into dual 9-bit bytes with byte-oriented latch enable and output enable control signals. This device is pliant with IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture with the incorporation of the defined boundary-scan test logic and test access port consisting of Test Data Input (TDI), Test Data Out (TDO), Test Mode Select (TMS), and Test Clock (TCK). Features n n n n n n n n n n IEEE 1149.1 (JTAG) pliant Buffered active-low...