SCAN18541T Datasheet | National Semiconductor

SCAN18541T Non-Inverting Line Driver with TRI-STATE Outputs September 1998 SCAN18541T Non-Inverting Line Driver with TRI-STATE ® Outputs General Description The SCAN18541T is a high speed, low-power line driver featuring separate data inputs organized into dual 9-bit bytes with byte-oriented paired output enable control signals. This device is pliant with IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture with the incorporation of the defined boundary-scan test logic and test access port consisting of Test Data Input (TDI), Test Data Out (TDO), Test Mode Select (TMS), and Test Clock (TCK). n n n n n n n n n Dual output enable signals per byte TRI-STATE outputs for bus-oriented applications 9-bit data busses for parity applications Reduced-swing outputs source 24 m A/sink 48 m A (Mil) Guaranteed to drive 50Ω transmission line to TTL input levels of 0.8V and 2.0V TTL patible inputs 25 mil pitch Cerpack packaging Includes CLAMP and HIGHZ instructions Standard Microcircuit Drawing (SMD) 5962-9311601 Features n IEEE 1149.1 (JTAG) pliant Connection Diagram Pin Names AOE1, AOE2 BOE1, BOE2 AO(0- 8) AO(0- 8) Description TRI-STATE Output Enable Input Pins, A Side TRI-STATE Output Enable Input Pins, B Side Output Pins, A Side Output Pins, B Side DS100324-1 Pin Names Pin Names AI(0- 8) BI(0- 8) TRI-STATE ® Description Input Pins, A Side Input Pins, B Side is a registered trademark of National Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100324 .national. Truth Tables Inputs AOE1 L H X L AOE2 L X H L Inputs BOE1 L H X L BOE2 L X H L BI (0- 8) H X X L H Z Z L AI (0- 8) H X X L H Z Z L BO (0- 8) AO (0- 8) H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Block Diagrams Byte A DS100324-2 Tap Controller DS100324-3 .national. Block Diagrams (Continued) Byte B DS100324-4 Note: BSR stands for Boundary Scan...