54ABT16245 Datasheet | National Semiconductor

Description The ’ABT16245 contains sixteen non-inverting bidirectional buffers with TRI-STATE outputs and is intended for bus oriented applications. The device is byte controlled. Each byte has separate control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state. n Separate control logic for each byte n 16-bit version of the ’ABT245 n A and B output sink capability of 48 m A, source capability of 24 m A n Guaranteed latchup protection n High impedance glitch free bus loading during entire power up and power down cycle n Non-destructive hot insertion capability n Standard Microcircuit Drawing (SMD) 5962-9317501 Features n Bidirectional non-inverting buffers Military 54ABT16245W-QML Package Number WA48A Package Description 48-Lead Cerpack Logic Symbol DS100200-1 Pin Description Pin Names OEn T/Rn A0- A15 B0- B15 Description Output Enable Input (Active Low) Transmit/Receive Input Side A Inputs/Outputs Side B Inputs/Outputs TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100200 .national. Print Date=1998/08/27 Print Time=14:50:42 44961 ds100200 Rev. No. 1 cmserv Proof Connection Diagram Pin Assignment for Cerpack Logic Diagrams DS100200-3 DS100200-2 Functional Description The ’ABT16245 contains sixteen non-inverting bidirectional buffers with TRI-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. DS100200-4 Truth Table Inputs OE1 L L H Inputs OE2 L L H T/R2 L H X Bus B8- B15 Data to Bus A8- A Bus A8- A15 Data to Bus B8- B 15 15 15 Outputs L H X Bus B0- B7 Data to Bus A0- A Bus A0- A7 Data to Bus B0- B T/R1 7 7 7 HIGH-Z State on A0- A7, B0- B Outputs HIGH-Z State on A8- A15, B8-...