54ACT174 Datasheet | National Semiconductor

Description The ’AC/’ACT174 is a high-speed hex D flip-flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW-to-HIGH clock transition. The device has a Master Reset to simultaneously clear all flip-flops. n Outputs source/sink 24 m A n ’ACT174 has TTL-patible inputs n Standard Microcircuit Drawing (SMD) - ’AC174: 5962-87626 - ’ACT174: 5962-87757 Features n ICC reduced by 50% Logic Symbols Pin Names D0- D5 CP MR Q0- Q5 Description Data Inputs Clock Pulse Input Master Reset Input Outputs DS100277-1 IEEE/IEC DS100277-2 FACT™ is a trademark of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100277 .national. Connection Diagrams Pin Assignment for DIP and Flatpak Pin Assignment for LCC DS100277-4 DS100277-3 Functional Description The ’AC/’ACT174 consists of six edge-triggered D flip-flops with individual D inputs and Q outputs. The Clock (CP) and Master Reset (MR) are mon to all flip-flops. Each D input’s state is transferred to the corresponding flip-flop’s output following the LOW-to-HIGH Clock (CP) transition. A LOW input to the Master Reset (MR) will force all outputs LOW independent of Clock or Data inputs. The ’AC/’ACT174 is useful for applications where the true output only is required and the Clock and Master Reset are mon to all storage elements. Truth Table Inputs MR L H H H CP X Output D X H L X Q L H L Q H = HIGH Voltage Level L = LOW Voltage Level N = LOW-to-HIGH Transition X = Immaterial Logic Diagram DS100277-5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. .national. Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) DC Input Diode Current...