Datasheet Summary
3.3V / 2.5V / 1.8V / 1.5V 3:1:10 LVCMOS Fanout Buffer
Description The NB3F8L3010C is a 3:1:10 Clock / Data fanout buffer operating on a 3.3 V / 2.5 V Core VDD and two flexible 3.3 V / 2.5 V / 1.8 V / 1.5 V VDDOn supplies which must be equal or less than VDD.
A Mux selects between a Crystal input, or either of two differential/SE Clock / Data inputs. Differential Inputs accept LVPECL, LVDS, HCSL, or SSTL and Single- Ended levels. The MUX control lines, SEL0 and SEL1, select CLK0/CLK0, CLK1/CLK1, or Crystal input pins per Table 3. The Crystal input is disabled when a Clock input is selected. Output enable pin, OE, synchronously forces a High Impedance state (HZ) when Low per...