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NB3N3002 - HCSL Clock Generator

Datasheet Summary

Description

The NB3N3002 is a precision, low phase noise clock generator that supports PCI

Express and Ethernet requirements.

The device accepts a 25 MHz fundamental mode parallel resonant crystal and generates a differential HCSL output at 25 MHz, 100 MHz, 125 MHz or 200 MHz clock frequencies.

Features

  • Uses 25 MHz Fundamental Mode Parallel Resonant Crystal.
  • External Loop Filter is Not Required.
  • HCSL Differential Output or LVDS with Proper Termination.
  • For Selectable Multipliers of the Input Frequency.
  • Output Enable with Tri.
  • State Outputs.
  • PCIe Gen1, Gen2, Gen3 Jitter Compliant.
  • Typical TIE RMS jitter of 2.5 ps.
  • Phase Noise: @ 100 MHz Offset Noise Power 100 Hz.
  • 109.4 dBc 1 kHz.
  • 127.8 dBc 10 kHz.

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Datasheet preview – NB3N3002

Datasheet Details

Part number NB3N3002
Manufacturer ON Semiconductor
File Size 122.91 KB
Description HCSL Clock Generator
Datasheet download datasheet NB3N3002 Datasheet
Additional preview pages of the NB3N3002 datasheet.

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Full PDF Text Transcription

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NB3N3002 3.3V, Crystal to 25MHz, 100MHz, 125MHz and 200MHz HCSL Clock Generator Description The NB3N3002 is a precision, low phase noise clock generator that supports PCI−Express and Ethernet requirements. The device accepts a 25 MHz fundamental mode parallel resonant crystal and generates a differential HCSL output at 25 MHz, 100 MHz, 125 MHz or 200 MHz clock frequencies. Outputs can interface with LVDS with proper termination (See Figure 5). This device is housed in 5.0 mm x 4.4 mm narrow body TSSOP 16 pin package.
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