| Part number | NB4N527S |
|---|---|
| Datasheet | NB4N527S_ONSemiconductor.pdf |
| File Size | 175.99 KB |
| Manufacturer | onsemi |
| Description | Dual AnyLevel to LVDS Receiver/Driver/Buffer/Translator |
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Pin Name I/O Description 1 VTD1 − Internal 50 W termination pin for D1. (RTIN) 2 D1 LVPECL, CML, LVDS, Noninverted differential clock/data D1 input (Note 1). LVCMOS, LVTTL, HSTL 3 D1 LVPECL, CML, LVDS, Inverted differential clock/data D1 input (Note 1).
| Part Number | Description |
|---|---|
| NB4N507A | PECL Clock Synthesizer |
| NB4N111K | Clock Fanout Buffer |
| NB4N1158 | Link Replicator |
| NB4N11M | Multi Level Clock/Data Input to CML Receiver/Buffer/Translator |
| NB4N11S | 3.3V 1:2 AnyLevel Input to LVDS Fanout Buffer /Translator |
| NB4N121K | 3.3V Differential 1:21 Differential Fanout Clock Driver |
| NB4N316M | AnyLevel Receiver to CML Driver/Translator |
| NB4N441 | 3.3V Serial Input MultiProtocol PLL Clock Synthesizer |
| NB4N7132 | Link Replicator |
| NB4N840M | 3.3V 3.2Gb/s Dual Differential Clock/Data 2 x 2 Crosspoint Switch |
