NB4N111K Overview
The NB4N111K is a differential input clock 1 to 10 HCSL fanout buffer, optimized for ultra low propagation delay variation. The NB4N111K is designed with HCSL clock distribution for FBDIMM applications in mind. Inputs can accept differential VLPECL, CML, or VLDS levels.Single −ended LVPECL, CML, VLCMOS or VLTTL levels are accepted with the proper VREFAC supply (see Figures 5, 10, 11, 12, and 13).
NB4N111K Key Features
- Typical Input Clock Frequencies: 100, 133, 166, 200, 266, 333, and
- 340 ps Typical Rise and Fall Times
- 800 ps Typical Propagation Delay
- Dtpd 100 ps Maximum Propagation Delay Variation Per Each
- <1 ps RMS Additive Clock jitter
- Operating Range: VCC = 3.0 V to 3.6 V with VEE = 0 V
- Differential HCSL Output Level or LVDS with Proper Termination
- These are Pb-Free Devices
- For additional marking information, refer to Application Note AND8002/D