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NB4N316M - AnyLevel Receiver to CML Driver/Translator

General Description

Pin Name I/O Description 1 NC

No Connect.

ECL, CML, LVCMOS, LVDS, Noninverted Differential Input.

ECL, CML, LVCMOS, LVDS, Inverted Differential Input.

Internally Generated Reference Voltage Supply.

Key Features

  • an input threshold hysteresis of approximately 25 mV, providing increased noise immunity and stability. The device is offered in a small 8.
  • pin TSSOP package (MSOP.
  • 8 compatible).

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Datasheet Details

Part number NB4N316M
Manufacturer onsemi
File Size 225.76 KB
Description AnyLevel Receiver to CML Driver/Translator
Datasheet download datasheet NB4N316M Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
NB4N316M 3.3 V AnyLevel] Receiver to CML Driver/Translator with Input Hysteresis 2.0 GHz Clock / 2.5 Gb/s Data The NB4N316M is a differential Clock or Data receiver and will accept AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated to CML, operating up to 2.0 GHz or 2.5 Gb/s, respectively. As such, the NB4N316M is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The CML outputs are 16 mA open collector (see Figure 18) which requires resistor (RL) load path to VTT termination voltage (see Figure 19). The open collector CML outputs must be terminated to VTT at power up.