NB6L572M Overview
The differential Clock / Data inputs have internal 50 W termination resistors and will accept differential LVPECL, CML, or LVDS logic levels. The NB6L572M incorporates a pair of Select pins that will choose one of four differential inputs and will produce two identical CML output copies of Clock or Data. As such, the NB6L572M is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock/Data distribution...
NB6L572M Key Features
- Differential CML Outputs, 400 mV Peak-to-Peak
- Rev. 1
- Defaults HIGH when left open