NB7V586M Overview
NB7V586M 1.8V Differential 2:1 Mux Input to 1.2V/1.8V 1:6 CML Clock/Data Fanout Buffer / Translator Multi−Level Inputs w/ Internal Termination The NB7V586M is a differential 1−to−6 CML Clock/Data Distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select pin. The INx/INx inputs incorporate internal 50 W termination resistors and will accept differential LVPECL, CML, or LVDS logic levels (see Figure 12). The INx/INx...
NB7V586M Key Features
- For additional marking information, refer to Application Note AND8002/D
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NB7V586M Applications
- For additional marking information, refer to Application Note AND8002/D