NB7L585R Overview
MARKING DIAGRAM 1 The NB7L585R is a differential 1:6 RSECL Clock/Data distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select pin. The INx/INx inputs incorporate internal 50 W termination resistors and will accept LVPECL, CML, or LVDS logic levels. The NB7L585R produces six identical output copies of Clock or Data operating up to 7 GHz or 10 Gb/s, respectively.
NB7L585R Key Features
- Rev. 0
- LVTTL/LVCMOS Input
- RSECL Output I/O LVPECL, CML, LVDS Input Pin Description Non-inverted, Inverted, Differential Data Inputs internally bi