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P4C1256L - LOW POWER 32K x 8 STATIC CMOS RAM

Datasheet Summary

Description

The P4C1256L/LL is an asynchronous 262,144-bit low power CMOS static RAM organized as 32Kx8.

The CMOS memory requires no clocks or refreshing, and has equal access and cycle times.

Inputs are fully TTL-compatible.

Features

  • VCC Current (L/LL).
  • Operating: 70mA/50mA.
  • CMOS Standby: 100µA/10µA Access Times.
  • 55/70/85 Single 5 Volts ±10% Power Supply Easy Memory Expansion Using CE and OE Inputs Common Data I/O P4C1256L/LL LOW POWER 32K X 8 STATIC CMOS RAM Three-State Outputs Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology Automatic Power Down Packages.
  • 28-Pin 600 mil DIP.
  • 28-Pin 300 mil CERDIP.
  • 28-Pin 300 mil Narrow Body SOP.
  • 28-Pin 330 mil S.

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Datasheet Details

Part number P4C1256L
Manufacturer PYRAMID
File Size 631.12 KB
Description LOW POWER 32K x 8 STATIC CMOS RAM
Datasheet download datasheet P4C1256L Datasheet
Additional preview pages of the P4C1256L datasheet.

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Full PDF Text Transcription

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FEATURES VCC Current (L/LL) — Operating: 70mA/50mA — CMOS Standby: 100µA/10µA Access Times —55/70/85 Single 5 Volts ±10% Power Supply Easy Memory Expansion Using CE and OE Inputs Common Data I/O P4C1256L/LL LOW POWER 32K X 8 STATIC CMOS RAM Three-State Outputs Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology Automatic Power Down Packages — 28-Pin 600 mil DIP — 28-Pin 300 mil CERDIP — 28-Pin 300 mil Narrow Body SOP — 28-Pin 330 mil SOP — 28-Pin LCC (350x550mil) — 32-Pin LCC (450x550mil) DESCRIPTION The P4C1256L/LL is an asynchronous 262,144-bit low power CMOS static RAM organized as 32Kx8. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs are fully TTL-compatible. The RAM operates from a single 5V±10% tolerance power supply.
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