FEATURES
Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times) – 15/20/25/35 ns (Commercial/Industrial) Low Power Single 5V±10% Power Supply Data Retention with 2.0V Supply Three-State Outputs TTL/CMOS Compatible Outputs Fully TTL Compatible Inputs Standard Pinout (JEDEC Approved) – 24-Pin 300 mil DIP, SOJ DESCRIPTION
Inputs and outputs are fully TTL-compatible. With battery backup, data integrity is maintained for supply voltages down to 2.0V. Current drain is typically 10 µA from a 2.0V supply. Access times as fast as 15 nanoseconds are available, permitting greatly enhanced system speeds. CMOS is utilized to reduce power consumption. The P4C1258 is available in a 24-pin 300 mil DIP or SOJ packa
PYRAMID
