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CCD Delay Line Series
MN3883S
Full Multi-PAL-Compatible CCD Video Signal Delay Element
Overview
The MN3883S is a CCD signal delay element for video signal processing applications. It contains such components as a shift register clock driver, charge I/O blocks, 1/2nd frequency doubler, two switchable CCD analog shift registers, a clamp bias circuit, resampling output amplifiers, a mode selection circuit and booster circuits. When the switch input is "H" level, the MN3883S samples the input using the supplied clock signal with a frequency 7.15909 MHz of twice the NTSC color signal subcarrier frequency, and after adding in the attached filter delay, produces independent delays of 1 H (the horizontal scan period for the NTSC system) each for the two lines.
MN3883S Datasheet
