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PI90LV019 - Single Bus LVDS Transceiver

General Description

The PI90LV019, differential line driver and receiver (transceiver), is compliant to IEEE1596.3 SCI and ANSI/TIA/ EIA-644LVDS standards.

The logic interface provides maximum flexibility resulting from four separate lines that are provided: DIN, DE, RE, and ROUT.

Key Features

  • Balanced Output Impedance Light Bus Loading: 5pF typical Glitch-free power up/down (Driver Disabled) High Signaling Rate Capability: >500 Mbps Driver:.
  • ±350mV Differential Swing into:.
  • 100-ohm load (PI90LV019) Receiver:.
  • Accepts ±50mV (min. ) Differential Swing with up to 2.0V ground potential difference.
  • Propagation Delay of 3.3ns typ.
  • Low Voltage TTL (LVTTL) Outputs.
  • Open, Short, a.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI90LV019 Single Bus LVDS Transceiver Features • • • • • • Balanced Output Impedance Light Bus Loading: 5pF typical Glitch-free power up/down (Driver Disabled) High Signaling Rate Capability: >500 Mbps Driver: – ±350mV Differential Swing into: – 100-ohm load (PI90LV019) Receiver: – Accepts ±50mV (min.) Differential Swing with up to 2.0V ground potential difference – Propagation Delay of 3.3ns typ.